1. Field of the Invention
The invention relates to localized etching of Si crystals and somewhat more particularly to an etching method for such crystals which provides relatively gradually sloped side walls for the depressions or grooves etched in the surfaces thereof.
2. Prior Art
Hunter, "Handbook of Semiconductor Electronics," 1956, pages 3-8 suggests that an etching solution for Si or Ge substrates may comprise a mixture of HF and HNO.sub.3 and may include glacial acetic acid as a moderator and bromine as an accelerator. A commercially available etchant of this general type is available under the trade name CP4, which comprises a mixture of equal parts of concentrated (46%) HF and CH.sub.3 COOH (glacial acetic) to which 3 parts of concentrated HNO.sub.3 are added.
However, when such known etchant is used to produce grooves or trenches on Si substrates, disadvantages result. For example, during the production of elements of an integrated circuit on an epitaxial layer of one conductor type on a Si substrate of another conductor type, it is common to etch a groove or trench between each adjacent element so as to completely sever the epitaxial layer in order to suppress parasitic currents between the various elements. Thereafter, an insulator layer is provided within such a groove and extends over the edges thereof to the contact points of each individual element of the integrated circuit. Then conductor path is supplied to provide the necessary electrical linkage between the various elements of the integrated circuit.
However, as is known, such conductor paths frequently become ruptured or interrupted at the groove periphery when such grooves are produced with conventional etchants, such as CP4. An explanation of this prior art defect is shown at FIG. 1. This partial cross-sectional view illustrates an etch profile of a groove or hole in a Si substrate produced by CP.sub.4 through a suitable etch mask, for example composed of Si.sub.3 N.sub.4. As can be seen, the profile begins with a very steep slope having an angle of declanation of about 90.degree.. When the Si surface within and outside such a groove is oxidized after removal of the Si.sub.3 N.sub.4 mask so that a SiO.sub.2 protective layer forms thereon and one attempts to provide a conductor path across the groove for connecting the semiconductor elements on opposite sides thereof, an interruption or rupture in such conductor paths usually occurs at the upper edge of the groove, due to the steep angle of the groove side walls.